to our customers, old company name in catalogs and other documents on april 1 st , 2010, nec electronics corporation merged with renesas technology corporation, and renesas electronics corporation took over all the business of both companies. therefore, although the old company name remains in this document, it is a valid renesas electronics document. we appreciate your understanding. renesas electronics website: http://www.renesas.com april 1 st , 2010 renesas electronics corporation issued by: renesas electronics corporation ( http://www.renesas.com ) send any inquiries to http://www.renesas.com/inquiry .
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rev.2.00 aug. 19, 2004 page 1 of 7 hd74lvcz16244a 16?bit buffers / line drivers with 3?state outputs rej03d0374?0200 (previous ade-205-232 (z)) rev.2.00 aug. 19, 2004 description the hd74lvcz16244a has sixteen line drivers with three state outputs in a 48 pin package. this device is a non inverting buffer and has four active low enables (1 g to 4 g ). each enable independently controls four buffers. when v cc is between 0 and 1.5 v, the device is in the high impedance state during power up or power down. low voltage and high-speed operation is suitable at battery drive product (note type personal computer) and low power consumption extends the life of a battery for long time operation. features ? v cc = 2.7 to 5.5 v ? all inputs v ih (max) = 5.5 v (@v cc = 0 to 5.5 v) ? all outputs v o (max) = 5.5 v (@v cc = 0 v or output off state) ? typical v ol ground bounce < 0.8 v (@v cc = 3.3 v, ta = 25c) ? typical v oh undershoot > 2.0 v (@v cc = 3.3 v, ta = 25c) ? high impedance state during power up and power down ? power off disables outputs, permitting live insertion ? high output current 24 ma (@v cc = 3.0 to 5.5 v) ? ordering information part name package type package code package abbreviation taping abbreviation (quantity) hd74lvcz16244atel tssop?48 pin ttp?48dbv t el (1,000 pcs/reel) function table inputs g a output y hxz lhh lll h: high level l: low level x: immaterial z: high impedance
hd74lvcz16244a rev.2.00 aug. 19, 2004 page 2 of 7 pin arrangement (top view) 1 2 3 4 5 6 7 8 9 10 v cc 1 g 1y1 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 1y2 gnd 1y3 1y4 2y1 2y2 gnd 2y3 2y4 3y1 3y2 gnd 3y3 3y4 4y1 4y2 gnd 4y3 4y4 4 g v cc 3 g 4a4 4a3 gnd 4a2 4a1 3a4 3a3 gnd 3a2 3a1 2a4 2a3 gnd 2a2 2a1 1a4 1a3 1a2 2 g gnd 1a1 v cc v cc absolute maximum ratings item symbol ratings unit conditions supply voltage v cc ?0.5 to 7.0 v input voltage v i ?0.5 to 7.0 v ?0.5 to 7.0 output ?z? or v cc : off output voltage v o ?0.5 to v cc +0.5 v output ?h? or ?l? input diode current i ik ?50 ma v i < 0 output diode current i ok ?50 ma v o < 0 output current i o 50 ma v cc , gnd current i cc or i gnd 100 ma storage temperature tstg ?65 to 150 c note: the absolute maximum ratings are values, which must not individually be exceeded, and furthermore, no two of which may be realized at the same time.
hd74lvcz16244a rev.2.00 aug. 19, 2004 page 3 of 7 recommended operating conditions item symbol ratings unit conditions supply voltage v cc 2.7 to 5.5 v at operation input voltage v i 0 to 5.5 v 0 to 5.5 output ?z? or v cc : off output voltage v o 0 to v cc v output ?h? or ?l? ?12 v cc = 2.7 v i oh ?24 *1 ma v cc = 3.0 to 5.5 v 12 v cc = 2.7 v output current i ol 24 *1 ma v cc = 3.0 to 5.5 v input rise / fall time t r , t f 0 to 6 ns / v operating temperature ta ?40 to +85 c note: 1. duty cycle 50% logic diagram 1 g 1 47 1a1 1a2 1a3 1a4 2 1y1 1y2 1y3 1y4 46 3 44 5 43 6 2 g 48 41 2a1 2a2 2a3 2a4 8 2y1 2y2 2y3 2y4 40 9 38 11 37 12 3 g 25 36 3a1 3a2 3a3 3a4 13 3y1 3y2 3y3 3y4 35 14 33 16 32 17 4 g 24 30 4a1 4a2 4a3 4a4 19 4y1 4y2 4y3 4y4 29 20 27 22 26 23
hd74lvcz16244a rev.2.00 aug. 19, 2004 page 4 of 7 electrical characteristics (ta = ?40 to 85c) item symbol v cc (v) min typ max unit test conditions 2.7 to 3.6 2.0 ? ? v ih 4.5 to 5.5 v cc 0.7 ? ? v 2.7 to 3.6 ? ? 0.8 input voltage v il 4.5 to 5.5 ? ? v cc 0.3 v 2.7 to 5.5 v cc ?0.2 ? ? i oh = ?100 a 2.7 2.2 ? ? 3.0 2.4 ? ? i oh = ?12 ma 3.0 2.2 ? ? v oh 4.5 3.8 ? ? v i oh = ?24 ma 2.7 to 5.5 ? ? 0.2 i ol = 100 a 2.7 ? ? 0.4 i ol = 12 ma 3.0 ? ? 0.55 output voltage v ol 4.5 ? ? 0.55 v i ol = 24 ma input current i in 0 to 5.5 ? ? 5 av in = 0 to 5.5 v i oz 2.7 to 5.5 ? ? 5 v out = 0 to 5.5 v i ozpu 0 to 1.5 ? ? 5 off state output current i ozpd 1.5 to 0 ? ? 5 a v out = 0.5 to 5.5 v, output enable = don?t care output leak current i off 0??5 av in or v o = 5.5 v 2.7 to 3.6 ? ? 225 v in = 3.6 to 5.5 v *1 , i o = 0 i cc 2.7 to 5.5 ? ? 350 a v in = v cc or gnd quiescent supply current ? i cc 2.7 to 3.6 ? ? 500 a v in = one input at (v cc ?0.6) v, other inputs at v cc or gnd input capacitance c in 3.3 ? 4.1 ? pf v in = v cc or gnd output capacitance c o 3.3 ? 8.1 ? pf v out = v cc or gnd note: 1. this applies in the disabled state only. switching characteristics (ta = ?40 to 85c) item symbol v cc (v) min typ max unit from (input) to (output) 2.7 ??4.7 3.30.3 1.1 ? 4.1 propagation delay time t plh t phl 5.00.5 ? ? 3.8 ns a y 2.7 ??5.8 3.30.3 1.0 ? 4.6 output enable time t zh t zl 5.00.5 ? ? 4.4 ns g y 2.7 ??6.2 3.30.3 1.8 ? 5.8 output disable time t hz t lz 5.00.5 ? ? 4.6 ns g y 2.7 ??? 3.30.3 ? ? 1.0 between output pin skew *1 t oslh t oshl 5.00.5 ? ? 1.0 ns note: 1. this parameter is c haracterized but not tested. t oslh = |t plhm ?t plhn |, t oshl = |t phlm ?t phln |
hd74lvcz16244a rev.2.00 aug. 19, 2004 page 5 of 7 test circuit v cc open see under table c = 50 pf 1 g to 4 g 1y1 to 4y4 1a1 to 4a4 output *1 input see function table pulse generator z out = 50 ? 500 ? 450 ? 50 scope ? gnd 6 v v cc s1 l vcc=2.7v, vcc=5.00.5v 3.30.3v t / t plh phl open gnd t / t zh hz t / t zl lz 2 v cc symbol s1 open gnd note: 1. c includes probe and jig capacitance. l
hd74lvcz16244a rev.2.00 aug. 19, 2004 page 6 of 7 t plh t phl v oh v oh v ol v ol gnd v ih 10 % 90 % input a waveform ? a waveform ? b output y waveforms ? 1 waveforms ? 2 v ref 10 % 90 % v ref v ref v ref v ref v ref v ref rf v ref t r t f t r t f t zl gnd v ih v ih v ref v oh1 v ol1 v oh1 v ol1 t lz t zh t hz 10 % 10 % 90 % 90 % input g v ? 0.3 v oh v + 0.3 v ol vcc=2.7v, vcc=5.00.5v 3.30.3v gnd 3 v 1.5 v 2.7 v 50%v cc v cc v cc test notes: 1. input waveform : prr = 10 mhz, duty cycle 50%, t = 2.5 ns, t = 2.5 ns 2. waveform ? a shows input conditions such that the output is ?l? level when enabled by the output control. 3. waveform ? b shows input conditions such that the output is ?h? level when enabled by the output control. gnd
hd74lvcz16244a rev.2.00 aug. 19, 2004 page 7 of 7 power up / down characteristics ta = 25 ? c output enable = ?l? 0 1.0 2.0 v cc (v) v out (v) 3.0 4.0 enable area disable area 1.0 0 2.0 3.0 4.0 package dimensions package code jedec jeita mass (reference value) ttp?48dbv ? ? 0.20 g *pd plating 0.08 m 0.10 *0.15 0.05 8.10 0.20 0.50 0.1 0.65 max 124 25 48 12.5 6.10 0? ? 8? 0.50 1.20 max 0.10 0.05 12.7 max 1.0 *0.19 0.05 as of january, 2002 unit: mm
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